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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling Ayan Mandal Softcover reprint of the original 1st ed. 2014 edition
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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Ayan Mandal
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
156 pages, 85 black & white illustrations, 10 colour illustrations, 21 black & white tables, biograp
| Media | Böcker Pocketbok (Bok med mjukt omslag och limmad rygg) |
| Releasedatum | 23 augusti 2016 |
| ISBN13 | 9781493948178 |
| Utgivare | Springer-Verlag New York Inc. |
| Antal sidor | 143 |
| Mått | 155 × 235 × 9 mm · 231 g |
| Språk | Engelska |